Semiconductor Manufacturing Technology 1st Edition by Chue San Yoo- Ebook PDF Instant Download/Delivery: 9813106719, 9789813106710
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ISBN 10: 9813106719
ISBN 13: 9789813106710
Author: Chue San Yoo
This textbook contains all the materials that an engineer needs to know to start a career in the semiconductor industry. It also provides readers with essential background information for semiconductor research. It is written by a professional who has been working in the field for over two decades and teaching the material to university students for the past 15 years. It includes process knowledge from raw material preparation to the passivation of chips in a modular format.
Semiconductor Manufacturing Technology 1st Table of contents:
1. OVERVIEW
1.1. Classification of Materials
1.2. Evolution of Integrated Circuit (IC) Industry
1.3. From Design to Chips
1.4. The Wafer Substrate Manufacturing Flow
1.5. Wafer Processing Flow
1.6. What Is the Semiconductor Industry Trying to Achieve?
1.7. The Never-Ending E.ort — Yield Improvement
2. BUILDING BLOCKS FOR INTEGRATED CIRCUITS
2.1. Fundamental Semiconductor Concepts
2.1.1. Energy band theory and chemical bonding theory
2.1.2. Doping of a semiconductor element
2.1.3. Mobility
2.1.4. Resistivity
2.2. Resistors
2.3. The pn Junctions
2.4. Capacitors
2.5. The MOS Transistor
2.6. Integrated Circuits
3. THERMAL OXIDATION
3.1. Introduction
3.2. Oxidation Mechanism and Modeling
3.2.1. Macroscopic modeling
3.2.1.1. Case 1
3.2.1.2. Case 2
3.2.2. Microscopic modeling
3.3. Isolation Technology
3.4. Gate Oxide
3.5. Cleaning before Thermal Oxidation
4. GAS KINETICS AND PLASMA PHYSICS
4.1. Gas Kinetics and Ideal Gases
4.1.1. Ideal gas law
4.1.2. The mean traveling speed of a gas molecule
4.1.3. Collision frequency and mean free path
4.2. What Is Plasma? How Is It Formed?
4.3. Introduction to Plasma Physics
4.4. Electron Impact Phenomena
4.5. Fundamental Plasma Reactor Configurations
4.6. Magnetic Field Confinement
5. CHEMICAL VAPOR DEPOSITION
5.1. Classification of CVD Reactors and Films
5.2. CVD Reactor Design Concepts
5.3. CVD Reactor Modeling
5.3.1. Macroscopic modeling
5.3.2. Microscopic modeling
5.4. Characterization of Thin Films
5.5. Applications of CVD Films
6. PLASMA-ENHANCED CHEMICAL VAPOR DEPOSITION AND ETCHING
6.1. The Plasma Reaction Pathways and SystemVariables
6.2. Introduction to PECVD and Film Characterization
6.3. Applications of PECVD Films
6.3.1. PECVD oxide
6.3.2. PECVD nitride
6.3.3. PETEOS
6.4. Introduction to Plasma Etching
6.5. Applications of Plasma Etching
6.5.1. Polysilicon gate etching
6.5.2. Tungsten polycide etching
6.5.3. Tungsten etching
6.5.4. Dielectric layer etching
6.5.5. Spacer etching
6.5.6. Silicided contact etching
6.5.7. Aluminum metal etching
6.5.8. Chromium etching
6.5.9. Resist ashing
6.6. Plasma-Enhanced CVD and Etching Reactor Modeling
7. PATTERN TRANSFER: PHOTOLITHOGRAPHY
7.1. Introduction
7.2. Preexposure Steps
7.2.1. Priming
7.2.2. Resist coating
7.2.3. Soft baking
7.3. Resist Chemistry
7.4. Fundamentals of Image Formation
7.4.1. Exposure wavelength
7.4.2. Lens imperfections
7.4.3. Interference
7.4.4. Depth of focus
7.4.5. Coherence
7.4.6. Optical transfer function
7.5. The Exposure System Evolution and Photoprocess Variations
7.6. Postexposure Steps
7.6.1. Postexposure bake
7.6.2. Developing and hard bake
8. PATTERN GENERATION
8.1. Introduction
8.2. Electron Beam Writing and Resists
8.2.1. The e-beam system
8.2.2. The e-beam resist
8.3. Back-End Processing for Mask Making
8.3.1. The mask inspection
8.3.2. The mask repair
8.3.3. Mask cleaning
8.3.4. Pellicle mounting
8.4. Resolution Enhancement Technology
8.4.1. Phase shifting mask technology
8.4.2. Off-axis illumination
8.4.3. Optical proximity correction
8.4.4. Subresolution assist features
9. DOPING TECHNOLOGY
9.1. Introduction
9.2. Dopant Diffusion
9.3. Ion Implantation
9.4. Implant Damages and Annealing
9.5. Applications of Doping Technology
10. METALLIZATION AND SILICIDATION
10.1. Introduction
10.2. Sputtering Systems
10.3. AluminumMetal System
10.3.1. Barrier metal systems
10.3.2. Antireflective coatings
10.4. Meeting the Step Coverage Requirements
10.5. Why Silicides?
11. PLANARIZATION AND CMP TECHNOLOGY
11.1. Introduction
11.2. Interlayer Dielectrics
11.2.1. CMP and dummy patterns
11.3. Spin on Glass
11.4. Intermetal Dielectrics
11.4.1. Planarization for passivation
11.5. Introduction to Chemical Mechanical Polishing and Its Applications
11.5.1. Introduction to CMP
11.5.2. CMP application
11.5.2.1. Oxide CMP
11.5.2.2. Tungsten CMP
11.5.2.3. Copper CMP
11.6. CMPModeling
12. COPPER AND LOW-k
12.1. Back-End Processes
12.2. Cu Wiring
12.2.1. The barrier layer for copper
12.2.2. The copper seed layer
12.2.3. The bulk copper growth
12.2.4. The ECD system
12.2.5. The additives for the ECD bath
12.2.6. Post-ECD anneal
12.3. Low-k Dielectrics
12.4. Integration of Copper and Low-k Materials
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Chue San Yoo,Semiconductor,Manufacturing,Technology