Crystal Growth and Evaluation of Silicon for VLSI and ULSI 1st Edition by Golla Eranna ISBN 1482232812 9781482232813

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ISBN 10: 1482232812 
ISBN 13: 9781482232813
Author: Golla Eranna

Silicon, as a single-crystal semiconductor, has sparked a revolution in the field of electronics and touched nearly every field of science and technology. Though available abundantly as silica and in various other forms in nature, silicon is difficult to separate from its chemical compounds because of its reactivity. As a solid, silicon is chemical

Crystal Growth and Evaluation of Silicon for VLSI and ULSI 1st Table of contents:

1. Introduction
1.1 Silicon: The Semiconductor
1.2 Why Single Crystals
1.3 Revolution in Integrated Circuit Fabrication Technology and the Art of Device Miniaturization
1.4 Use of Silicon as a Semiconductor
1.5 Silicon Devices for Boolean Applications
1.6 Integration of Silicon Devices and the Art of Circuit Miniaturization
1.7 MOS and CMOS Devices for Digital Applications
1.8 LSI, VLSI, and ULSI Circuits and Applications
1.9 Silicon for MEMS Applications
1.10 Summary
References
2. Silicon: The Key Material for Integrated Circuit FabricationTechnology
2.1 Introduction
2.2 Preparation of Raw Silicon Material
2.3 Metallurgical-Grade Silicon
2.4 Purification of Metallurgical-Grade Silicon
2.5 Ultra-High Pure Silicon for Electronics Applications
2.6 Polycrystalline Silicon Feed for Crystal Growth
2.7 Summary
References
3. Importance of Single Crystals for Integrated Circuit Fabrication
3.1 Introduction
3.2 Crystal Structures
3.2.1 Different Crystal Structures in Nature
3.2.2 Cubic Structures
3.3 Diamond Crystal Structure
3.3.1 Silicon Crystal Structure
3.3.2 Silicon Crystals and Atomic Packing Factors
3.4 Crystal Order and Perfection
3.5 Crystal Orientations and Planes
3.6 Influence of Dopants and Impurities in Silicon Crystals
3.7 Summary
References
4. Different Techniques for Growing Single-Crystal Silicon
4.1 Introduction
4.2 Bridgman Crystal Growth Technique
4.3 Czochralski Crystal Growth/Pulling Technique
4.3.1 Crucible Choice for Molten Silicon
4.3.2 Chamber Temperature Profile
4.3.3 Seed Selection for Crystal Pulling
4.3.4 Environmental and Ambient Control in the Crystal Chamber
4.3.5 Crystal Pull Rate and Seed/Crucible Rotation
4.3.6 Dopant Addition for Growing Doped Crystals
4.3.6.1 Boron
4.3.6.2 Phosphorus
4.3.6.3 Arsenic
4.3.6.4 Gallium
4.3.6.5 Nitrogen
4.3.6.6 Antimony
4.3.6.7 Germanium
4.3.7 Methods for Continuous Czochralski Crystal Growth
4.3.8 Impurity Segregation Between Liquid and Grown Silicon Crystals
4.3.9 Crystal Growth Striations
4.3.10 Use of a Magnetic Field in the Czochralski Growth Technique
4.3.11 Large-Area Silicon Crystals for VLSI and ULSI Applications
4.3.12 Post-Growth Thermal Gradient and Crystal Cooling after Pull-Out
4.4 Float-Zone Crystal Growth Technique
4.4.1 Seed Selection
4.4.2 Environment and Chamber Ambient Control
4.4.3 Heating Mechanisms and RF Coil Shape
4.4.4 Crystal Growth Rate and Seed Rotation
4.4.5 Dopant Distribution in Growing Crystals
4.4.6 Impurity Segregation between Liquid and Grown Silicon Crystals
4.4.7 Use of Magnetic Fields for Float-Zone Growth
4.4.8 Large Area Silicon Crystals and Limitations of Shape and Size
4.4.9 Thermal Gradient and Post-Growth Crystal Cooling
4.5 Zone Refining of Single-Crystal Silicon
4.6 Other Silicon Crystalline Structures and Growth Techniques
4.6.1 Silicon Ribbons
4.6.2 Silicon Sheets
4.6.3 Silicon Whiskers and Fibers
4.6.4 Silicon in Circular and Spherical Shapes
4.6.5 Silicon Hollow Tubes
4.6.6 Casting of Polycrystalline Silicon for Photovoltaic Applications
4.7 Summary
References
5. From Silicon Ingots to Silicon Wafers
5.1 Introduction
5.2 Radial Resistivity Measurements
5.3 Boule Formation, Identification of Crystal Orientation, and Flats
5.4 Ingot Slicing
5.5 Mechanical Lapping of Wafer Slices
5.6 Edge Profiling of Slices
5.7 Chemical Etching and Mechanical Damage Removal
5.8 Chemimechanical Polishing for Planar Wafers
5.9 Surface Roughness and Overall Wafer Topography
5.10 Megasonic Cleaning
5.11 Final Cleaning and Inspection
5.12 Summary
References
6. Evaluation of Silicon Wafers
6.1 Introduction
6.2 Acoustic Laser Probing Technique
6.3 Atomic-Force Microscope Studies on Surfaces
6.4 Auger Electron Spectroscopic Studies
6.5 Chemical Staining and Etching Techniques
6.6 Contactless Characterization
6.7 Deep-Level Transient Spectroscopy
6.8 Defect Decoration by Metals
6.9 Electron Beam and High-Energy Electron Diffraction Studies
6.10 Flame Emission Spectrometry
6.11 Four-Point Probe Technique for Resistivity Measurement and Mapping
6.12 Fourier Transform Infrared Spectroscopy Measurements for Impurity Identification
6.13 Gas Fusion Analysis
6.14 Hall Mobility
6.15 Mass Spectra Analysis
6.16 Minority Carrier Diffusion Length/Lifetime/Surface Photovoltage
6.17 Optical Methods for Impurity Evaluation
6.18 Photoluminescence Method for Determining Impurity Concentrations
6.19 Gamma-Ray Diffractometry
6.20 Scanning Electron Microscopy for Defect Analysis
6.21 Scanning Optical Microscope
6.22 Secondary Ion Mass Spectrometer for Impurity Distribution
6.23 Spreading Resistance and Two-Point Probe Measurement Technique
6.24 Stress Measurements
6.25 Transmission Electron Microscopy
6.26 van der Pauw Resistivity Measurement Technique for Irregular-Shaped Wafers
6.27 X-ray Technique for Crystal Perfection and Dislocation Density
6.28 Summary
References
7. Resistivity and Impurity Concentration Mapping of Silicon Wafers
7.1 Introduction
7.2 Electrically Active and Inactive Impurities
7.3 Surface Mapping and Concentration Contours
7.4 Surface Roughness Mapping on a Complete Wafer
7.5 Summary
References
8. Impurities in Silicon Wafers
8.1 Effect of Intentional and Unintentional Impurities and Their Influence on Silicon Devices
8.2 Intentional Dopant Impurities in Silicon Wafers
8.2.1 Aluminum
8.2.2 Antimony
8.2.3 Arsenic
8.2.4 Boron
8.2.5 Gallium
8.2.6 Phosphorus
8.3 Unintentional Dopant Impurities in Silicon Wafers
8.3.1 Carbon
8.3.2 Chromium
8.3.3 Copper
8.3.4 Germanium
8.3.5 Gold
8.3.6 Helium
8.3.7 Hydrogen
8.3.8 Iron
8.3.9 Nickel
8.3.10 Nitrogen
8.3.11 Oxygen
8.3.12 Tin
8.4 Other Metallic Impurities
8.5 Summary
References
9. Defects in Silicon Wafers
9.1 Introduction
9.2 Impact of Defects in Silicon Devices and Structures
9.3 Point Defects and Vacancies
9.4 Line Defects
9.5 Bulk Defects and Voids
9.6 Dislocations and Screw Dislocations
9.7 Swirl Defects
9.8 Stacking Faults
9.9 Precipitations
9.10 Surface Pits/Crystal-Originated Particles
9.11 Grown Vacancies and Defects
9.12 Thermal Donors
9.13 Slips, Cracks, and Shape Irregularities
9.14 Stress, Bowing, and Warpage
9.15 Summary
References
10. Silicon Wafer Preparation for VLSI and ULSI Processing
10.1 Introduction
10.2 Purity of Chemicals Used for Silicon Processing
10.3 Degreasing of Silicon Wafers
10.4 Removal of Metallic and Other Impurities
10.5 Gettering of Metallic Impurities
10.6 Denuding of Silicon Wafers
10.7 Neutron Irradiation
10.8 Argon Annealing of Wafers
10.9 Hydrogen Annealing of Wafers
10.10 Final Cleaning, Rinsing, and Wafer Drying
10.11 Summary
References
11 Packing of Silicon Wafers
11.1 Packing of Fully Processed Blank Silicon Wafers
11.2 Storage of Wafers and Control of Particulate Contamination
11.3 Storage of Wafers and Control of Particulate Contamination with Process-Bound Wafers
11.4 Summary

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Tags: Golla Eranna, Crystal, Evaluation